4단계 BK21 사업성과

4단계 BK21 사업성과

[조정호 교수 연구실] Approaching Theoretical Limits in the Performance of Printed P-Type CuI Transistors via Room Temperature Vacancy Engineering

  • 날짜 2024.07.22
  • 조회수 100

Abstract:  Development of a novel high performing inorganic p‐type thin film transistor could pave the way for new transparent electronic devices. This complements the widely commercialized n‐type counterparts, indium‐gallium‐zinc‐oxide (IGZO). Of the few potential candidates, copper monoiodide (CuI) stands out. It boasts visible light transparency and high intrinsic hole mobility (>40 cm2 V−1 s−1), and is suitable for various low‐temperature processes. However, the performance of reported CuI transistors is still below expected mobility, mainly due to the uncontrolled excess charge‐ and defect‐scattering from thermodynamically favored formation of copper and iodine vacancies. Here, a solution‐processed CuI transistor with a significantly improved mobility is reported. This enhancement is achieved through a room‐temperature vacancy‐engineering processing strategy on high‐k dielectrics, sodium‐embedded alumina. A thorough set of chemical, structural, optical, and electrical analyses elucidates the processing‐dependent vacancy‐modulation and its corresponding transport mechanism in CuI. This encompasses defect‐ and phonon‐scattering, as well as the delocalization of charges in crystalline domains. As a result, the optimized CuI thin film transistors exhibit exceptionally high hole mobility of 21.6 ± 4.5 cm2 V−1 s−1. Further, the successful operation of IGZO‐CuI complementary logic gates confirms the applicability of the device.

논문정보:  Advanced Materials, 35(51), 2307206
Published:  December 21, 2023
DOI:  doi.org/10.1002/adma.202307206


SNS Share 페이스북 공유하기트위터 공유하기네이버 공유하기